Generational GC Performance Regressions

[Peter Lobsinger]

I have re-enabled optimized register access for non-gcables in
5829c74. This mitigates some of the costs.

However, gcable register access is far from optimal. We have
annotations in the ops files to determine whether a register will be
written or not. A read-only GCable register access (by far the
majority) should not incur a WB. Ops2c needs to become smarter to
handle this.

Additionally, I have become aware of a7d4bdc3 ("Disable shortcuts for
setting CallContext fields. We do need write barriers."), which also
has a considerable cost to the md5sum benchmark. I suspect that we
should be able to re-enable some (but not all) of these to regain
significant speed.